1. Field of the Invention
This invention relates to a process for forming integrated circuit structures. More particularly, this invention relates to a process for forming low dielectric constant silicon oxide dielectric material while suppressing pressure spiking and inhibiting increase of the dielectric constant of such low dielectric constant silicon oxide dielectric material.
2. Description of the Related Art
In the continuing reduction of scale in integrated circuit structures, both the width of metal interconnects or lines and the horizontal spacing between such metal lines on any particular level of such interconnects have become smaller and smaller. As a result, horizontal capacitance has increased between such conductive elements. This increase in capacitance, together with the vertical capacitance which exists between metal lines on different layers, results in loss of speed and increased cross-talk. As a result, reduction of such capacitance, particularly horizontal capacitance, has received much attention. One proposed approach to solving this problem of high capacitance is to replace the conventional silicon oxide (SiO.sub.2) dielectric material, having a dielectric constant (k) of about 4.0, with another dielectric material having a lower dielectric constant to thereby lower the capacitance.
Dobson et al., in "Advanced SiO.sub.2 Planarization Using Silane and H.sub.2 O.sub.2 ", published in Semiconductor International, Volume 17, No. 14, December 1994, at pages 85-88, describe a so-called "flowfill" process to deposit self-planarized layers of silicon dioxide with good gap-fill properties for high aspect ratio gaps, when silane (SiH.sub.4) is reacted with an excess of hydrogen peroxide (H.sub.2 O.sub.2) vapor (formed by flash vaporization of 30% or more concentrated H.sub.2 O.sub.2) at low pressure. Under optimized conditions of pressure and temperature, flowable silica is deposited which has the ability to fill deep sub-micron features while at the same time providing excellent local and global planarization.
More recently, in an article by L. Peters, entitled "Pursuing the Perfect Low-K Dielectric", published in Semiconductor International, Volume 21, No. 10, September 1998, at pages 64-74, a number of low dielectric constant (low k) dielectric materials are disclosed and discussed. Included in these dielectric materials is a description of a low k dielectric material having a dielectric constant of about 3.0 formed using a modified version of the above-described Flowfill chemical vapor deposition (CVD) process developed by Trikon Technologies of Newport, Gwent, U.K. The process is said to react methyl silane (CH.sub.3 --SiH.sub.3) with hydrogen peroxide (H.sub.2 O.sub.2) to form monosilicic acid which condenses on a cool wafer and is converted into an amorphous methyl-doped silicon oxide which is annealed at 400.degree. C. to remove moisture. The article goes on to state that beyond methyl silane, studies show a possible k of 2.75 using dimethyl silane in the Flowfill process.
An article by S. McClatchie et al. entitled "Low Dielectric Constant Oxide Films Deposited Using CVD Techniques", published in the 1998 Proceedings of the Fourth International Dielectrics For ULSI Multilevel Interconnection Conference (Dumic) held on February 16-17, 1998 at Santa Clara, Calif., at pages 311-318, also describes the formation of methyl-doped silicon oxide by the low-k Flowfill process of reacting methyl silane with H.sub.2 O.sub.2 to achieve a dielectric constant of .about.2.9. The authors then further describe the formation of low-k dielectric material using dimethyl silane (CH.sub.3).sub.2 --SiH.sub.2, thereby achieving a dielectric constant of .about.2.75.
While the ability to form low k silicon oxide dielectric films having the ability to fill deep sub-micron features while at the same time exhibiting excellent planarization is very desirable, it has been found that momentary pressure bursts or "spiking" can occur during the reaction, as well as the appearance of haze on the surface of the film apparently due to condensation problems, which all contribute negatively to the properties of the film. Furthermore, when process conditions such as methyl silane/hydrogen peroxide concentration ratio, total flow rates, and reactor chamber pressure are adjusted to avoid the occurrence of the pressure spiking, it has been found that loss of the low k properties of the film can occur, apparently due to decomposition of the organic group of the organo-silane reactant, e.g., the methyl group of methyl silane under the conditions favoring suppression of spiking.
It would, therefore, be desirable to provide a process for forming a low k silicon oxide dielectric material having the ability to fill deep sub-micron features while also exhibiting excellent planarization without the occurrence of pressure spiking or the occurrence of haze on the surface of the low k film, and without loss of the low k properties of the film.